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8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 1 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer g eneral d escription the ics8427-02 is a general purpose, six lvhstl output high frequency synthesizer and a member of the hiperclocks? family of high performance clock solutions from ics. the ics8427-02 can support a very wide output frequency range of 15.625mhz to 500mhz. the device powers up at a default output frequency of 200mhz with a 16.6667mhz crystal interface, and the frequency can then be changed using the serial programm- ing interface to change the m feedback divider and n output divider. frequency steps as small as 125khz can be achieved using a 16.6667mhz crystal and the output divider set for 16. the low jitter and frequency range of the ics8427-02 make it an ideal clock generator for most clock tree applications. f eatures ? six differential lvhstl outputs ? selectable crystal input interface or test_clk input ? test_clk accepts the following input types: lvcmos, lvttl ? output frequency range: 15.625mhz to 500mhz ? vco range: 250mhz to 500mhz ? serial interface for programming feedback and output dividers ? supports ssc, -0.5% downspread. can be enabled through use of the serial programming interface. ? output skew: 100ps (maximum) ? cycle-to-cycle jitter: 50ps (maximum) ? 2.5v core/1.8v output supply voltage ? 0c to 70c ambient operating temperature ? industrial temperature information available upon request ? available in both standard and lead-free rohs-compliant packages hiperclocks? ic s b lock d iagram 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 xtal_out test_clk xtal_sel v dda s_load s_data s_clock mr v ddo fout2 nfout2 v ddo fout3 nfout3 oe gnd gnd nfout5 fout5 v ddo nfout4 fout4 v dd test xtal_in v dd vco_sel fout0 nfout0 v ddo fout1 nfout1 32-lead lqfp 7mm x 7mm x 1.4mm package body y package top view ics8427-02 osc vco_sel xtal_sel test_clk xtal_in xtal_out oe s_load s_data s_clock vco pll fout0 nfout0 fout1 nfout1 fout2 nfout2 fout3 nfout3 fout4 nfout4 fout5 nfout5 test 1, 2, 4, 8, 16 configuration interface logic m 0 1 0 1 16 phase detector mr 2 32-lead vfqfn 5mm x 5mm x 0.75mm package body k package top view p in a ssignment
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 2 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer note: the functional description that follows describes op- eration using a 16.6667mhz crystal. valid pll loop divider values for different crystal or input frequencies are defined in the input frequency characteristics, table 6 note 1. the ics8427-02 features a fully integrated pll and therefore requires no external components for setting the loop bandwidth. a parallel-resonant, fundamental crystal is used as the input to the on-chip oscillator. the output of the oscillator is divided by 16 prior to the phase detector. with a 16.6667mhz crystal, this provides a 1.0417mhz reference frequency. the vco of the pll operates over a range of 250mhz to 500mhz. the output of the m divider is also applied to the phase detector. the phase detector and the m divider force the vco output fre- quency to be 2m times the reference frequency by adjusting the vco control voltage. note that for some values of m (either too high or too low), the pll will not achieve lock. the output of the vco is scaled by a divider prior to being sent to each of the lvpecl output buffers. the divider provides a 50% output duty cycle. the ics8427-02 powers up by default to 200mhz output fre- quency, using a 16.6667mhz crystal (m = 192, n = 2). the output frequency can be changed after power-up by using the serial interface to program the m feedback divider and the n output divider. the relationship between the vco frequency, the crystal fre- quency and the m divider is defined as follows: the m value and the required values of m0 through m8 are shown in table 3b, programmable vco frequency function table. valid m values for which the pll will achieve lock for a 16.6667mhz reference are defined as 120 m 240. the frequency out is defined as follows: serial operation occurs when s_load is low. the shift register is loaded by sampling the s_data bits with the rising edge of s_clock. the contents of the shift register are loaded into the m divider and n output divider when s_load transitions from low-to-high. the m divide and n output divide values are latched on the high-to-low transition of s_load. if s_load is held high, data at the s_data input is passed directly to the m divider and n outputdivider on each rising edge of s_clock. the serial mode can be used to program the m and n bits and test bits t1 and t0. the internal registers t0 and t1 determine the state of the test output as follows: f unctional d escription n fout = fvco = 16 2m fxtal x n 16 fvco = fxtal x 2m t1 t0 test output 0 0 low 0 1 s_data, shift register input 1 0 output of m divider 1 1 cmos fout f igure 1. s erial l oad o perations t s t h t s time s_clock s_data s_load note: default output frequency, using a 16.6667mhz crystal on power-up = 200mhz (m = 192, n = 2) ssc off t1 t0 n2 n1 n0 m8 m7 m6 m5 m4 m3 m2 m1 m0 ssc (power-up default)
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 3 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer t s t h t s t1 t0 n2 n1 n0 m8 m7 m6 m5 m4 m3 m2 m1 m0 ssc t1 t0 n2 n1 n0 m8 m7 m6 m5 m4 m3 m2 m1 m0 ssc time m and n d ividers , ssc and t est m ode c ontrol b its 1 t0 t2 n1 n0 n8 m7 m6 m5 m4 m3 m2 m1 m0 mc s s test mode control register n divider m divider ssc control register ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? s_data ? test output t1:t0 = 01 shift register ? data transfer from shift register to m and n dividers and ssc and test control bits on a low-to-high transition of s_load. 1 t0 t2 n1 n0 n8 m7 m6 m5 m4 m3 m2 m1 m0 mc s s ics8427-02 s hift r egister o peration ? r ead b ack c apability 1. device powers up by default in test mode 01. the test output in this case is wired to the shift register. 2. shift in serial data stream and latch into m, n, t1, t0 and ssc control bits. shift in t1:t0=00, so that the test output will be turned off after the bits are shifted in and latched. data transferred to m, n dividers, test and ssc control bits. changes to m, n, ssc and test mode bits take affect at this time. data latched into m, n dividers, test and ssc control bits. test output s_clock s_data s_load
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 4 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k r e b m u ne m a ne p y tn o i t p i r c s e d 0 3 , 3 1 , 4 , 1v o d d r e w o p. s n i p y l p p u s t u p t u o 3 , 2 , 2 t u o f 2 t u o f n t u p t u o. s l e v e l e c a f r e t n i l t s h . r i a p t u p t u o l a i t n e r e f f i d 6 , 5 , 3 t u o f 3 t u o f n t u p t u o. s l e v e l e c a f r e t n i l t s h . r i a p t u p t u o l a i t n e r e f f i d 7e ot u p n ip u l l u p . d e l b a n e e r a s t u p t u o e h t , h g i h n e h w . e l b a n e t u p t u o h g i h e v i t c a . h g i h = x t u o f n , w o l = x t u o f , w o l n e h w . s l e v e l e c a f r e t n i l t t v l / s o m c v l 6 1 , 8d n gr e w o p. d n u o r g y l p p u s r e w o p 9t s e tt u p t u o . n o i t a r e p o f o e d o m l a i r e s e h t n i e v i t c a s i h c i h w t u p t u o t s e t . s l e v e l e c a f r e t n i l t t v l / s o m c v l 6 2 , 0 1v d d r e w o p. s n i p y l p p u s e r o c 2 1 , 1 1 , 4 t u o f 4 t u o f n t u p t u o. s l e v e l e c a f r e t n i l t s h . r i a p t u p t u o l a i t n e r e f f i d 5 1 , 4 1 , 5 t u o f 5 t u o f n t u p t u o. s l e v e l e c a f r e t n i l t s h . r i a p t u p t u o l a i t n e r e f f i d 7 1r mt u p n in w o d l l u p s r e d i v i d l a n r e t n i e h t , h g i h c i g o l n e h w . t e s e r r e t s a m h g i h e v i t c a d e t r e v n i e h t d n a w o l o g o t x t u o f s t u p t u o e u r t e h t g n i s u a c t e s e r e r a s r e d i v i d l a n r e t n i e h t , w o l c i g o l n e h w . h g i h o g o t x t u o f n s t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l . d e l b a n e e r a s t u p t u o e h t d n a 8 1k c o l c _ st u p n ip u l l u p . r e t s i g e r t f i h s e h t o t n i a t a d _ s l a i r e s d a o l o t k c o l c t u p n i . s l e v e l e c a f r e t n i l t t v l / s o m c v l 9 1a t a d _ st u p n ip u l l u p f o e g d e g n i s i r e h t n o d e l p m a s a t a d . t u p n i l a i r e s r e t s i g e r t f i h s . s l e v e l e c a f r e t n i l t t v l / s o m c v l . k c o l c _ s 0 2d a o l _ st u p n in w o d l l u p . s r e d i v i d e h t o t n i r e t s i g e r t f i h s m o r f a t a d f o n o i t i s n a r t s l o r t n o c . s l e v e l e c a f r e t n i l t t v l / s o m c v l 1 2v a d d r e w o p. n i p y l p p u s g o l a n a 2 2 l e s _ l a t x t u p n ip u l l u p e c n e r e f e r l l p e h t s a t u p n i t s e t r o t u p n i l a t x n e e w t e b s t c e l e s k l c _ t s e t s t c e l e s . h g i h n e h w t u p n i l a t x s t c e l e s . e c r u o s . s l e v e l e c a f r e t n i l t t v l / s o m c v l . w o l n e h w 3 2k l c _ t s e tt u p n in w o d l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l . t u p n i k c o l c t s e t 5 2 , 4 2 , t u o _ l a t x n i _ l a t x t u p n i . t u p n i e h t s i n i _ l a t x . e c a f r e t n i r o t a l l i c s o l a t s y r c . t u p t u o e h t s i t u o _ l a t x 7 2l e s _ o c vt u p n ip u l l u p . e d o m s s a p y b r o l l p n i s i r e z i s e h t n y s r e h t e h w s e n i m r e t e d . s l e v e l e c a f r e t n i l t t v l / s o m c v l 9 2 , 8 2 , 0 t u o f 0 t u o f n t u p t u o. s l e v e l e c a f r e t n i l t s h . r i a p t u p t u o l a i t n e r e f f i d 2 3 , 1 3 , 1 t u o f 1 t u o f n t u p t u o. s l e v e l e c a f r e t n i l t s h . r i a p t u p t u o l a i t n e r e f f i d : e t o n p u l l u p d n a n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 5 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer enabled disabled nfout0:5 fout0:5 f igure 2. oe t iming d iagram oe nvco t able 3a. c ontrol i nput f unction t able s t u p n is t u p t u o e ol e s _ l a t xe c r u o s d e t c e l e s5 t u o f : 0 t u o f5 t u o f n : 0 t u o f n 00 k l c _ t s e tw o l ; d e l b a s i dh g i h ; d e l b a s i d 01 t u o _ l a t x , n i _ l a t xw o l ; d e l b a s i dh g i h ; d e l b a s i d 10 k l c _ t s e td e l b a n ed e l b a n e 11 t u o _ l a t x , n i _ l a t xd e l b a n ed e l b a n e e g d e o c v g n i l l a f d n a g n i s i r a g n i w o l l o f d e l b a n e r o d e l b a s i d e r a s t u p t u o k c o l c e h t , s e h c t i w s e o r e t f a n i n w o h s s a . 2 e r u g i f vco
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 6 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer t able 3b. p rogrammable vco f requency f unction t able note 1 t able 3c. s erial m ode f unction t able t able 3d. p rogrammable o utput d ivider f unction t able t u p n i e u l a v r e d i v i d n ) z h m ( y c n e u q e r f t u p t u o 2 n1 n0 nm u m i n i mm u m i x a m 000 2 5 2 10 5 2 00 1 4 5 . 2 65 2 1 010 8 5 2 . 1 35 . 2 6 011 6 15 2 6 . 5 15 2 . 1 3 10 0 1 0 5 20 0 5 10 1 2 5 2 10 5 2 110 4 5 . 2 65 2 1 111 8 5 2 . 1 35 . 2 6 y c n e u q e r f o c v ) z h m ( e d i v i d m 6 5 28 2 14 62 36 18421 8 m7 m6 m5 m4 m3 m2 m1 m0 m 0 5 20 2 1 00 1111000 8 0 . 2 5 21 2 1 00 111100 1 7 1 . 4 5 22 2 1 00 11110 10 ? ? ????????? 0 0 42 9 1 0 11000000 ? ? ????????? 2 9 . 7 9 49 3 2 0 1110 1111 0 0 50 4 2 0 11110000 . z h m 7 6 6 6 . 6 1 f o y c n e u q e r f t u p n i n a o t d n o p s e r r o c s e i c n e u q e r f g n i t l u s e r e h t d n a s e u l a v e d i v i d m e s e h t : 1 e t o n s t u p n i s n o i t i d n o c r md a o l _ sk c o l c _ sa t a d _ s hx x x . h g i h = x t u o f n , w o l = x t u o f . w o l l a i t n e r e f f i d s t u p t u o s e c r o f . t e s e r ll x x n o i t i s n a r t w o l t x e n l i t n u d e d a o l s n i a m e r d n a s r e t s i g e r t u p n i o t n i d e h c t a l s i a t a d . s r u c c o t n e v e l a i r e s a l i t n u r o ll a t a d g n i s i r h c a e n o a t a d _ s n o a t a d h t i w d e d a o l s i r e t s i g e r t f i h s . e d o m t u p n i l a i r e s . k c o l c _ s f o e g d e l la t a d . r e d i v i d t u p t u o n d n a r e d i v i d m e h t o t d e s s a p e r a r e t s i g e r t f i h s e h t f o s t n e t n o c l la t a d. d e h c t a l e r a s e u l a v r e d i v i d t u p t u o n d n a r e d i v i d m ll x x . s r e t s i g e r t f i h s t c e f f a t o n o d t u p n i l a i r e s lh a t a d. d e k c o l c s i t i s a r e d i v i d m o t y l t c e r i d d e s s a p a t a d _ s w o l = l : e t o n h g i h = h e r a c t ' n o d = x n o i t i s n a r t e g d e g n i s i r = n o i t i s n a r t e g d e g n i l l a f =
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 7 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer t able 4a. p ower s upply dc c haracteristics , v dd = v dda = 2.5v5%, v ddo = 1.8v0.2v, t a = 0c to 70c t able 4b. lvcmos/lvttl dc c haracteristics , v dd = v dda = 2.5v5%, v ddo = 1.8v0.2v, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i 7 . 1v d d 3 . 0 +v v l i e g a t l o v w o l t u p n i 3 . 0 -7 . 0v i h i t u p n i t n e r r u c h g i h k l c _ t s e t , d a o l _ s , r mv d d v = n i v 5 2 6 . 2 =0 5 1a , l e s _ o c v , l e s _ l a t x e o , a t a d _ s , k c o l c _ s v d d v = n i v 5 2 6 . 2 =5a i l i t u p n i t n e r r u c w o l k l c _ t s e t , d a o l _ s , r m v d d =v 5 2 6 . 2, v n i v 0 = 5 -a , l e s _ o c v , l e s _ l a t x e o , a t a d _ s , k c o l c _ s v d d =, v 5 2 6 . 2 v n i v 0 = 0 5 1 -a v h o t u p t u o e g a t l o v h g i h 1 e t o n ; t s e t5 . 1v v l o t u p t u o e g a t l o v w o l 1 e t o n ; t s e t 4 . 0v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n v o t o d d . 2 / note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5v outputs, i o continuous current 50ma surge current 100ma package thermal impedance, ja for 32 lead lqfp 47.9c/w (0 lfpm) for 32 lead vfqfn 34.8c/w (0 lfpm) storage temperature, t stg -65c to 150c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d y l p p u s e r o c5 7 3 . 25 . 25 2 6 . 2v v a d d e g a t l o v g o l a n a5 7 3 . 25 . 25 2 6 . 2v v o d d e g a t l o v t u p t u o6 . 18 . 10 . 2v i d d t n e r r u c y l p p u s r e w o p 5 7 1a m i a d d t n e r r u c y l p p u s g o l a n a 5 1a m i 0 d d t n e r r u c y l p p u s t u p t u od a o l o n0a m
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 8 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer t able 6. i nput c haracteristics , v dd = v dda = 2.5v5%, v ddo = 1.8v0.2v, t a = 0c to 70c t able 5. c rystal c haracteristics r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 2 10 4z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 1w m t able 4c. lvhstl dc c haracteristics , v dd = v dda = 2.5v5%, v ddo = 1.8v0.2v, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u o9 . 03 . 1v v l o 1 e t o n ; e g a t l o v w o l t u p t u o04 . 0v v x o 2 e t o n ; e g a t l o v r e v o s s o r c t u p t u o0 40 6% v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p6 . 01 . 1v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n v 5 . 2 e e s . d n g o t e r u g i f t i u c r i c t s e t d a o l t u p t u o e h t n i . n o i t c e s n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p . n o i t i d n o c n e v i g a t a g n i w s e g a t l o v t u p t u o o t t c e p s e r h t i w d e n i f e d : 2 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f n i y c n e u q e r f t u p n i k l c _ t s e t 1 = t c e l e s o c v2 10 4z h m ) e d o m s s a p y b ( 0 = t c e l e s o c v0 0 4z h m 1 e t o n ; l a t x2 10 4z h m k c o l c _ s 0 5z h m t t u p n i _ r e m i t e s i r t u p n ik l c _ t s e t 5s n y c n e u q e r f o c v m u m i x a m r o m u m i n i m e h t e v e i h c a o t t e s e b t s u m e u l a v m e h t e g n a r y c n e u q e r f l a t s y r c e h t r o f : 1 e t o n 7 6 1 e r a m f o s e u l a v d i l a v z h m 2 1 f o y c n e u q e r f m u m i n i m e h t g n i s u . z h m 0 0 5 r o z h m 0 5 2 f o e g n a r m 6 5 2 . e h t g n i s u 0 5 e r a m f o s e u l a v d i l a v z h m 0 4 f o y c n e u q e r f m u m i x a m m . 0 0 1
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 9 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer t able 7. ac c haracteristics , v dd = v dda = 2.5v5%, v ddo = 1.8v0.2v, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 0 5z h m t ) c c ( t i j3 , 1 e t o n ; r e t t i j e l c y c - o t - e l c y c f t u o z h m 0 0 2 =0 30 5s p f t u o z h m 7 6 2 =0 30 5s p f t u o z h m 3 3 3 =0 30 5s p f t u o z h m 0 0 4 =0 30 5s p t ) 0 5 t ( t t i jr e t t i j e l c y c 0 5 t f t u o z h m 0 0 2 =0 0 2s p f t u o z h m 7 6 2 =0 0 2s p f t u o z h m 3 3 3 =0 0 2s p f t u o z h m 0 0 4 =0 0 2s p t ) r e p ( t i j1 e t o n ; s m r , r e t t i j d o i r e p 5 . 25s p t ) o ( k s3 , 2 e t o n ; w e k s t u p t u o 5 60 0 1s p f m 5 , 4 e t o n ; y c n e u q e r f n o i t a l u d o m c s s f t u o z h m 0 0 2 =0 33 3 . 3 3z h k f t u o z h m 7 6 2 =0 33 3 . 3 3z h k f t u o z h m 3 3 3 =0 33 3 . 3 3z h k f t u o z h m 0 0 4 =0 33 3 . 3 3z h k f f m 5 , 4 e t o n ; r o t c a f n o i t a l u d o m c s s f t u o z h m 0 0 2 =3 . 06 . 0% f t u o z h m 7 6 2 =4 . 06 . 0% f t u o z h m 3 3 3 =3 . 06 . 0% f t u o z h m 0 0 4 =3 . 06 . 0% c s s d e r 5 , 4 e t o n ; n o i t c u d e r l a r t c e p s f t u o z h m 0 0 2 =7 -0 1 -b d f t u o z h m 7 6 2 =7 -2 1 -b d f t u o z h m 3 3 3 =7 -1 1 -b d f t u o z h m 0 0 4 =7 -2 1 -b d f e r r u p s r u p s e c n e r e f e r f t u o z h m 0 0 2 =0 4 -b d f t u o z h m 7 6 2 =0 4 -b d f t u o z h m 3 3 3 =5 4 -b d f t u o z h m 0 0 4 =0 5 -b d t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 23 3 37 6 6s p t s e m i t p u t e s k c o l c _ s o t a t a d _ s5s n d a o l _ s o t k c o l c _ s5s n t h e m i t d l o h k c o l c _ s o t a t a d _ s5s n d a o l _ s o t k c o l c _ s5s n c d oe l c y c y t u d t u p t u o 1 = n0 40 6% 2 = n5 45 5% t k c o l e m i t k c o l l l p 1s m . n o i t c e s n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s . s t u p n i l a t x g n i s u e c n a m r o f r e p r e t t i j : 1 e t o n . s n o i t i d n o c d a o l l a u q e h t i w d n a e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n . s t n i o p s s o r c l a i t n e r e f f i d t u p t u o e h t t a d e r u s a e m . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 3 e t o n . d e l b a n e g n i k c o l c m u r t c e p s d a e r p s : 4 e t o n . l a t s y r c z t r a u q z h m 7 6 6 6 . 6 1 a g n i s u : 5 e t o n
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 10 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer p arameter m easurement i nformation t50 c ycle - to -c ycle j itter s pur r eduction p eriod j itter o utput s kew c ycle - to -c ycle j itter 2.5v c ore /1.8v o utput l oad ac t est c ircuit scope lvhstl qx nqx 2.5v5% 0v t sk(o) nfoutx foutx nfouty fouty t jit(cc) = t cycle n ? t cycle n+1 1000 cycles t cycle n t cycle n+1 fout0:5 nfout0:5 v oh v ref v ol mean period (first edge after trigger) reference point (trigger edge) 1 contains 68.26% of all measurements 2 contains 95.4% of all measurements 3 contains 99.73% of all measurements 4 contains 99.99366% of all measurements 6 contains (100-1.973x10 -7 )% of all measurements histogram v dd gnd v ddo 1.8v0.2v t jit (50) = period n ? period n +50 minimum 16,667 consective cycles 334 measurements period n period n + 50 period n + 50 + 50 frequency dbm reference spu r fout0:5 nfout0:5 v dda = 2.5v5%
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 11 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer clock outputs 20% 80% 80% 20% t r t f v sw i n g t pw t period t pw t period odc = x 100% fout0:5 nfout0:5 60% 50% v oh v ol 40% v ox o utput c rossover v oltage o utput r ise /f all t ime o utput d uty c ycle /p ulse w idth /p eriod fout0:5 nfout0:5
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 12 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer a pplication i nformation c rystal i nput i nterface the ics8427-02 has been characterized with 18pf parallel resonant crystals. the capacitor values, c1 and c2, shown in figure 3 below were determined using a 16.66mhz, 18pf figure 3. c rystal i npu t i nterface parallel resonant crystal and were chosen to minimize the ppm error. the optimum c1 and c2 values can be slightly adjusted for different board layouts. c1 22p x1 18pf parallel crystal c2 22p xtal_out xtal_in i nputs : c rystal i nput : for applications not requiring the use of the crystal oscillator input, both xtal_in and xtal_out can be left floating. though not required, but for additional protection, a 1k resistor can be tied from xtal_in to ground. test_clk i nput : for applications not requiring the use of the test clock, it can be left floating. though not required, but for additional protection, a 1k resistor can be tied from the test_clk to ground. lvcmos c ontrol p ins : all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. r ecommendations for u nused i nput and o utput p ins o utputs : lvhstl o utput all unused lvhstl outputs can be left floating. we recommend that there is no trace attached. both sides of the differential output pair should either be left floating or terminated.
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 13 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer spread-spectrum clocking is a frequency modulation tech- nique for emi reduction. when spread-spectrum is enabled, a 32.55khz triangle waveform is used with 0.5% down-spread (+0.0% / -0.5%) from the nominal 200mhz clock frequency. an example of a triangle frequency modulation profile is shown in figure 5a below. the ramp profile can be expressed as: ? fnom = nominal clock frequency in spread off mode (200mhz with 16.6667mhz in) ? fm = nominal modulation frequency = reference frequency 16 x 32 ? = modulation factor (0.5% down spread) (1 - ) fnom + 2 fm x x fnom x t when 0 < t < , (1 - ) fnom - 2 fm x x fnom x t when < t < 1 2 fm 1 2 fm 1 fm the ics8427-02 triangle modulation frequency deviation will not exceed 0.6% down-spread from the nominal clock fre- quency (+0.0% / -0.5%). an example of the amount of down spread relative to the nominal clock frequency can be seen in the frequency domain, as shown in figure 5b. the ratio of this width to the fundamental frequency is typically 0.4%, and will not exceed 0.6%. the resulting spectral reduction will be greater than 7db, as shown in figure 5b. it is important to note the ics8427-02 7db minimum spectral reduction is the component-specific emi reduction, and will not necessarily be the same as the system emi reduction. f igure 5b. 200mh z c lock o utput in f requency d omain (a) s pread -s pectrum off (b) s pread -s pectrum on f igure 5a. t riangle f requency m odulation s pread s pectrum fnom (1 - ) fnom 0.5/fm 1/fm as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. the ics8427-02 provides separate power supplies to isolate any high switching noise from the outputs to the internal pll. v dd , v dda , and v ddo should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. to achieve optimum jitter performance, power supply isolation is required. figure 4 illustrates how a 10 resistor along with a 10 f and a .01 f bypass capacitor should be connected to each v dda pin. p ower s upply f iltering t echniques f igure 4. p ower s upply f iltering 10 v dda 10 f .01 f 2.5v .01 f v dd b a ? 10 dbm = 0.3%
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 14 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer figure 6 shows an application schematic example of the ics8427-02. in this example, a 16.6667mhz, 18 pf parallel resonant crystal is used. the c1=22pf and c2=22pf are l ayout g uideline f igure 6. s chematic of r ecommended l ayout approximate values for frequency accuracy. the c1 and c2 may be slightly adjusted for optimizing frequency accuracy. c1 22p c2 22p vdd = 2.5v vddo = 1.8v c7 0.1u c6 0.1u vddo = 1.8v vddo = 1.8v zo = 50 zo = 50 xtal_sel test clk r2 50 r3 50 c9 0.1uf u1 ics8427-02 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 32 31 30 29 28 27 26 25 vddo fout2 nfout2 vddo fout3 nfout3 oe gnd test vdd fout4 nfout4 vddo fout5 nfout5 gnd mr s_clock s_data s_load vdda xtal _se l test clk xtal 2 nfout1 fout1 vddo nfout0 fout0 vco_sel vdd xtal1 vdd = 2.5v s_clock c10 0.1u c5 0.1u x1 16.6667mhz, 18pf c8 0.1u c4 10u vdd = 2.5v s_load r1 10 c3 0.01u s_data
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 15 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer p ower c onsiderations this section provides information on power dissipation and junction temperature for the ics8427-02. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ics8427-02 is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v dd = 2.5v + 5% = 2.625v, which gives worst case results. note: please refer to section 3 for details on calculating power dissipated in the load. ? power (core) max = v dd_max * i dd_max = 2.625v * 175ma = 459.4mw ? power (outputs) max = 32.6mw/loaded output pair if all outputs are loaded, the total power is 6 * 32.6mw = 195.6mw total power _max (3.465v, with all outputs switching) = 459.37mw + 195.6mw = 655mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1c/w per table 8a below. therefore, tj for an ambient temperature of 70c with all outputs switching is: 70c + 0.655w * 42.1c/w = 97.6c. this is well below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 67. 8c/w 55.9c/w 50.1c/w multi-layer pcb, jedec standard test boards 47. 9c/w 42.1c/w 39.4c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs. t able 8a. t hermal r esistance ja for 32-p in lqfp, f orced c onvection t able 8b. ja vs . a ir f low t able for a 32 l ead vfqfn ja by velocity (linear feet per minute) 0 multi-layer pcb, jedec standard test boards 34.8c/w
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 16 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer 3. calculations and equations. the purpose of this section is to derive the power dissipated into the load. lvhstl output driver circuit and termination are shown in figure 7. t o calculate worst case power dissipation into the load, use the following equations which assume a 50 load. pd_h is power dissipation when the output drives high. pd_l is the power dissipation when the output drives low. pd_h = (v oh_min /r l ) * (v dd_max - v oh_min ) pd_l = (v ol_max /r l ) * (v dd_max - v ol_max ) pd_h = (0.9v/50 ) * (2v - 0.9v) = 19.8mw pd_l = (0.4v/50 ) * (2v - 0.4v) = 12.8mw total power dissipation per output pair = pd_h + pd_l = 32.6mw f igure 7. lvhstl d river c ircuit and t ermination v ddo v out rl 50 q1
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 17 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer r eliability i nformation t ransistor c ount the transistor count for ics8427-02 is: 4585 t able 9a. ja vs . a ir f low t able for 32 l ead lqfp ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 67. 8c/w 55.9c/w 50.1c/w multi-layer pcb, jedec standard test boards 47. 9c/w 42.1c/w 39.4c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs. t able 9b. ja vs . a ir f low t able for a 32 l ead vfqfn ja 0 air flow (linear feet per minute) 0 multi-layer pcb, jedec standard test boards 34.8c/w
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 18 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer p ackage o utline - y s uffix for 32 l ead lqfp t able 10a. p ackage d imensions n o i t a i r a v c e d e j s r e t e m i l l i m n i s n o i s n e m i d l l a l o b m y s a b b m u m i n i ml a n i m o nm u m i x a m n 2 3 a 0 6 . 1 1 a 5 0 . 05 1 . 0 2 a 5 3 . 10 4 . 15 4 . 1 b 0 3 . 07 3 . 05 4 . 0 c 9 0 . 00 2 . 0 d c i s a b 0 0 . 9 1 d c i s a b 0 0 . 7 2 d 0 6 . 5 e c i s a b 0 0 . 9 1 e c i s a b 0 0 . 7 2 e 0 6 . 5 e c i s a b 0 8 . 0 l 5 4 . 00 6 . 05 7 . 0 q 0 7 c c c 0 1 . 0 reference document: jedec publication 95, ms-026
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 19 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer p ackage o utline - k s uffix for a 32 l ead vfqfn t able 10b. p ackage d imensions reference document: jedec publication 95, mo-220 n o i t a i r a v c e d e j s r e t e m i l l i m n i s n o i s n e m i d l l a l o b m y s 2 - d h h v m u m i n i ml a n i m o nm u m i x a m n 2 3 a 0 8 . 0- -0 0 . 1 1 a 0- -5 0 . 0 3 a . f e r 5 2 . 0 b 8 1 . 05 2 . 00 3 . 0 n d 8 n e 8 d c i s a b 0 0 . 5 2 d 5 2 . 15 2 . 25 2 . 3 e c i s a b 0 0 . 5 2 e 5 2 . 15 2 . 25 2 . 3 e c i s a b 0 5 . 0 l 0 3 . 00 4 . 00 5 . 0
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 20 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer t able 11. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. the aforementioned trademark, hiperclocks? is a trademark of integrated circuit systems, inc. or its subsidiaries in the unite d states and/or other countries. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t 2 0 - y d 7 2 4 8 s c i2 0 - y d 7 2 4 8 s c ip f q l d a e l 2 3y a r tc 0 7 o t c 0 t 2 0 - y d 7 2 4 8 s c i2 0 - y d 7 2 4 8 s c ip f q l d a e l 2 3l e e r & e p a t 0 0 0 1c 0 7 o t c 0 f l 2 0 - y d 7 2 4 8 s c il 2 0 y d 7 2 4 8 s c ip f q l " e e r f - d a e l " d a e l 2 3y a r tc 0 7 o t c 0 t f l 2 0 - y d 7 2 4 8 s c il 2 0 y d 7 2 4 8 s c ip f q l " e e r f - d a e l " d a e l 2 3l e e r & e p a t 0 0 0 1c 0 7 o t c 0 2 0 - k d 7 2 4 8 s c i2 0 - k d 7 2 4 8 s c in f q f v d a e l 2 3y a r tc 0 7 o t c 0 t 2 0 - k d 7 2 4 8 s c i2 0 - k d 7 2 4 8 s c in f q f v d a e l 2 3l e e r & e p a t 0 0 5 2c 0 7 o t c 0 f l 2 0 - k d 7 2 4 8 s c id b tn f q f v " e e r f - d a e l " d a e l 2 3y a r tc 0 7 o t c 0 t f l 2 0 - k d 7 2 4 8 s c id b tn f q f v " e e r f - d a e l " d a e l 2 3l e e r & e p a t 0 0 5 2c 0 7 o t c 0 . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n
8427dy-02 www.icst.com/products/hiperclocks.html rev. a february 17, 2006 21 integrated circuit systems, inc. ics8427-02 500mh z , l ow j itter lvcmos/c rystal - to -lvhstl f requency s ynthesizer t e e h s y r o t s i h n o i s i v e r v e re l b a te g a pe g n a h c f o n o i t p i r c s e de t a d a 1 1 t 0 1 0 2 . m a r g a i d t i u c r i c t s e t c a d a o l t u p t u o d e t a d p u . e g a k c a p p f q l r o f g n i k r a m e e r f - d a e l d e d d a - e l b a t n o i t a m r o f n i g n i r e d r o 6 0 / 7 1 / 2

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